fhelium.engine.ntt.plans
Host-side construction of NTT schedules and twiddle tables.
CompactPowerOfTwoRadixNttPlan
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CompactPowerOfTwoRadixNttPlan(ckks_config: CkksConfig, policy: CompactFixedRadixPolicy, *, device: str | int | torch.device | None=None)Radix-specific outer twists and fixed cyclic-root powers.
A radix-R digit evaluates one twisted cyclic R-point NTT. Radix-4, radix-8, and radix-16 use dedicated butterflies. Every digit has the exact policy radix, and incompatible ring dimensions are rejected. This does not alias grouped radix-2 execution.
Outer tables have integral shape [prime, N - 1] and root-power tables have shape [prime, radix] on device in standard representation. Prime rows follow ckks_config.moduli exactly; the four tables are separately allocated and do not alias.
CompactRadix2NttPlan
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CompactRadix2NttPlan(ckks_config: CkksConfig, *, device: str | int | torch.device | None=None)Canonical compact forward and inverse standard-residue twiddle rows.
Compact CUDA kernels compute butterfly indices in-kernel and consume one integral [prime, coefficient] twiddle table per transform direction. Prime rows follow ckks_config.moduli exactly; final extent is ckks_config.torch_dtype on device. Construction is functional and the forward and inverse tables do not alias.
IndexedRadix2NttPlan
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IndexedRadix2NttPlan(ckks_config: CkksConfig, *, device: str | int | torch.device | None=None)Radix-2 schedules used by the indexed backend.
Forward and inverse indices have shape [2, logN, N/2]. Expanded twiddles contain only the nontrivial odd lane and have shape [prime, logN, N/2]. No all-one even-lane tensor is allocated. Schedules use torch.int32; standard-residue twiddles use the config's integral dtype. All tensors are on device and prime rows follow ckks_config.moduli exactly. These immutable plan tables do not alias.